Introduction

With Labs 01 through 04, you should have ended up with a complete schematic for your FM radio project - congrats! Now that your entire circuit is in KiCad’s schematic editor, we can assign it to a PCB document and begin the board layout process.

Transferring Schematic to Layout

Running Schematic ERC

First things first - we want to make sure that our schematic looks good and makes electrical sense before we conduct the schematic-layout transfer. We can do this by running an Electrical Rules Check (ERC). It’ll follow a bunch of default rules that KiCad has setup that check for issues in our schematic such as:

• Unconnected pins,
• Connections between mismatched pin types (e.g., an output pin connected to an output pin),
• Cosmetic problems with the schematic sheet, and
• Missing symbol details.

After finding issues via the ERC check, we can view and address them one-by-one to ensure our schematic is in tip-top shape.

To run ERC, make sure you’re on your .kicad_sch file, and then go to Inspect->Electrical Rules Checker and hit Run ERC.

Afterwards, warnings and errors from the ERC will appear. Errors must be resolved in order to continue into layout, but warnings can technically be left unaddressed and won’t stop the schematic-layout transfer process. However, for this lab you want to resolve both. Double-clicking on an error/warning will allow you to zoom into the location where it is occuring. In the example below, it shows where there is an unconnected hierarchical pin.

Fixing the issue and running ERC again will cause the error/warning to disappear. Use this to your advantage and resolve any errors or warnings in your schematic.

Note that there are certain warnings that are okay to leave and not fix (mostly cosmetic issues that won’t affect the schematic-layout transfer process). If you’re unsure if a warning can be fixed or if it should be ignored, please feel free to ask the course staff. You may ignore the following warnings:

• Net has no driving source (typically is caused by an input/output pin being attached to a passive pin)
• Off grid net label or pin (the net label or pin is not neatly placed on the schematic sheet grid)
• Net has mulitple names (given that the stated differing net names are of two differently named ports/sheet entires that should be connected to each other).
• Net contains IO pin and Input Port objects (only if the nets and pins are referring to the Interfaces buttons).

Assigning Footprints to Components

Similar to what we did in Lab 01, we have to assign footprints to all of the components that we created in our schematic before we begin layout. We have created a custom footprint library for this project, which contains all of the footprints for the parts that we imported throughout Labs 03 and 04. To add this library to your project, first download the .zip file below. Unzip the file into a folder, and place it in your repository.

FM Radio Proejct KiCad Footprint Library

In KiCad, navigate to the .kicad_pcb file (to get there from the .kicad_sch file, go to Tools->Switch to PCB Editor). A new window should open. Go to Preferences->Manage Footprint Libraries. Then, hit the folder icon in the bottom left corner, navigate to your repository, and add the folder called FMRadioPartsFootprintLibrary.pretty. Now, all of the necessary footprints should appear in your footprint libraries. You can check this by switching into your footprint editor on the KiCad project home page (shown below):

Then, on the left-hand Libraries list, you should scroll down and see a library called FMRadioPartsFootprintLibrary, with the names of all our custom parts.

Once you see this, you are ready to assign footprints to all of the components that you used in your schematic. Navigate back to your .kicad_sch file, and go to Tools->Assign Footprints. All of the capacitors and resistors that we are using will be 0603 components, so go ahead and assign all of those.

• For resistors, select the Resistor_SMD library, and assign them to Resistor_SMD:R_0603_1608Metric.
• For capacitors, select the Capacitor_SMD library, and assign them to Capacitor_SMD:C_0603_1608Metric.
• For our two 120nH inductors, select the Inductor_SMD library, and assign them to Inductor_SMD:C_0603_1608Metric.
• One of our inductors is an 0805 component (the one we use for our LNA), so assign that specific inductor to an Inductor_SMD:L_0805_2012Metric.
• For the testpoints, select TestPoint library, and assign them to TestPoint:TestPoint_THTPad_D1.5mm_Drill0.7mm.

The footprints of the rest of our components should be included in the custom library that you just downloaded. Carefully assign each component to its footprint from that library. The component names should be similar or the same to the footprint names. Once each of your components has a footprint associated with it, your footprint assignment page should look something like this:

When you finish this process, each of your schematic components will be properly linked to a footprint, and you should be ready to start your layout!

Forward Annotation

Forward annotation refers to using our schematic to update what should be on our layout (there is also backwards annotation for updating the schematic from the layout, but this is a less common practice). With the schematic fully validated, we can conduct a forward annotation. From your schematic file, go to Tools->Update PCB from Schematic. If this button is greyed out, it means that your schematic file isn’t opened in the context of your entire project. Close your file, reopen KiCad, go to File->Open Project, and select the .kicad_pro file with your project’s name. From here, open the .kicad_sch file from the Project Files dropdown and the button should now be selectable.

A window should pop up with all the additions that are staged for the PCB file. Hit Update PCB.

You should end up with the generic KiCad PCB sheet and all of the board’s component’s footprints placed onto the document.

Preparing the Board

After having placed all of the schematic components onto the board via forward annotation, we can begin layout - woohoo!

Setting the Stackup

If you recall from Lecture 05, our first step in a PCB layout is configuring the board stackup. It’s mainly crucial to setting the number of copper layers we can use for routing, but it can also help us determine stackup-related factors such as impedance-controlled traces.

To access it, hit File → Board Stackup → Physical Stackup. KiCad’s default looks something like this:

Adjust the stackup so that it follows the two-layer stackup used by OSHPark¹. Additionally, use the FR4 substrate’s datasheet, linked on the same OSHPark two-layer stackup page, to determine the subtrate’s dielectric constant² at 1 GHz and input it accordingly into the Layer Stack Manager.

With the stackup set, we can use it to create an impedance profile that can be used to properly route differential pairs (used by the USB connection) later.

Go to the Net Classes section under Design Rules, and add a Net Class with the name USB Data. Set the Clearance to 6mil (0.1524mm), which is OSHPark’s minimum clearance, and the DP Width to 11mil (0.28mm). Together, this gives us a desired differential impedance of 90Ω, based on the substrate parameters of FR4.

Adjusting the Board Shape

Next is our configuring the physical shape of our board. We can make the shape of the board anything we want, but let’s keep it simple and give ourselves plenty of room by having it be a 100 mm by 100 mm square (which is the maximum board size for many low-cost manufacturers before additional costs are added).

You can configure the board’s shape by drawing a shape primitive then assigning it to be the board outline.

Begin by drawing a 100 mm by 100 mm rectangle on the Edge.Cuts layer, such as what’s shown below:

This defines the outline of our board. The origin of this sheet is hard set in the top left corner, so make note of the actual coordinates of your board outline. In the picture above, the top left corner of the rectangle is (50, 50) with respect to the top left corner of the sheet. Additionally, we want our board thickness to be 1mil, so right-click on your rectangle, go to Properties, and set the line width to 0.0254mm.

Mounting Holes

Along with the board shape, we should also take the time to define other mechanical features, such as mounting holes.

Use 4 pads with 3.5 mm holes size to create 4 mounting holes on your Front Copper layer (with their centers offset 4 mm from the edge) as shown below. Be sure to attach them to the GND net. To do this, press Place->Add Footprint (or hit the A key), and search for the MountingHole Library. To attach the mounting hole to GND, click on the pad and select PTH pad 1.

Then, hit the E key, and set the Net name to GND. While you do this for all 4 mounting holes, you can number the pads from 1 to 4, and also check that your X and Y positions are properly offset from the corners of your board outline by 4mm.

Once you’ve placed these, right click on them and lock them so that they don’t disappear during any subsequent forward annotations.

With these mounting holes, we should be able to use M3 screws to mount the board somewhere using standoffs if we need to.

Configuring DRC Rules

The final step before components can actually be connected together on the board is to define the rules that will be used in the design rules check (DRC). Such rules help ensure that the board will work electrically and is manufacturable. The rules typically include details such as:

• Clearance
• Via size
• Trace width
• Copper pour style

Since KiCad helps us adhere to DRC rules as we conduct our layout (such as by automatically selecting a legal trace width that aligns with DRC rules during routing), we want to set up the rules prior to any board work. Once again, we’ll use KiCad-specific two-layer board specifications to define our DRC rules.

Within your Board Setup window, head to Constraints under the Design Rules section, and fill it out based on these KiCad-specific design rules that OSHPark very kindly provides us.

These rules apply to every trace except for our differential pair traces, which we’ve already set our custom constraints for.

Organizing Board Components

Looking at what has been completed so far with our board:

• Schematic Forward Annotation? ✅
• Stackup? ✅
• Board Shape? ✅
• Mounting Holes? ✅
• DRC Rules? ✅

Now we can get into putting the layout together!

At this point, you have some more flexibility as to how you decide you would like to layout the board, but the following instructions will suggest a setup that maximizes performance and ease-of-routing. No matter how you decide you’d like to approach the board’s routing, it’s first a good practice to utilize the hierarchial block diagram abstraction we created in our schematic to guide the way we do the layout.

We’ll first begin this by organizing the structure of our board, determining what parts of the FM radio should go where, before we try to connect nets or components together. Once we have arranged our board to have components where we want them to be, we’ll then start routing traces and creating conections.

Partitioning the Board

Thinking back to Lecture 05 and 06, we had some key takeaways. Mainly that:

• We should section off different board functions into their own areas (following the top-level block diagram structure of our schematic closely),
• Keep noisy components or sections (e.g., power supplies, actuators) physically distant from sensitive ones (e.g., analog devices, high-speed digital ICs) within the board, and
• Keep circuits compact and connections short throughout the board.

Unlike Altium, KiCad doesn’t have its own automatic rooms, but we can create our own versions through rectangles on our board. We should arrange these “rooms” as shown below, with the components on a hierarchical sheet all going together in the same room. This setup should maximize the distance between the sensitive FM radio receiver chip and the power supply while still allowing for close connections to the speakers and ESP32 microcontroller. KiCad automatically groups sheets, so dragging related components together should be simple. When you draw the rooms, make sure the rectangles and text are on the Front Silkscreen layer.

When arranging the rooms, don’t worry about the placement of the individual components within each room just yet - just try to fit the grouped components in the rooms, however.

Placing Components

With all the rooms strategically organized, components can now be arranged within the rooms. Components should be placed close to each other while still allowing room for the footprints/pads to be manufacturable and for the components themselves to still be placed down on their footprints manually without hitting other components. Keep in the mind the following notes from the lectures regarding component placement:

• Decoupling capacitors should be placed close to the power pins of their respective IC.
• Silkscreen reference designators should be visible, only be placed on bare substrate or soldermask (not on exposed copper), and arranged in a such a way that there is understanding as to what footprint the reference designator is referring to.
• Ensure that routing a trace from one component to another can remain smooth and short.
• Air wires (the thin light-colored lines going from one pad to another) show net connections and are useful for telling what component connects to what at a glance.

From here on out, you’ll need to determine how your board should be setup, but the layout for the Microcontroller room/sheet will be shown as an example.

Component Routing

Only continue through this section if your schematic has been fully completed and checked by the course staff.

Routing Regular Traces

Use the Route Tracks tool or X key to route tracks/traces from pad to pad. Pressing V will allow you to place via. You will also be able to change/adjust the track/trace width and cornering style.

Routing Impedance-Controlled Traces

Using the Interactive Differential Pair tool, accessible via Route->Route Differential Pair, the differential USB data lines can be routed while maintaining the 90 Ohm differential impedance that they require. Notice how the gap between and width of the differential pair traces match what was determined in the impedance profile created in the Layer Stack Manager.

Copper Pours

Copper pours are useful nets that connect to a lot of components (such as the GND net). In the case of this board (and in general you may want to do this for most boards), we’ll be conducting a copper pour over the entire board outline on both the top and bottom layers and assigning it to the GND net.

In KiCad, we do this via Filled Zones, where the Filled Zone polygon is made to match the board outline. We can create one by selecting the Filled Zone tool while on either the top or bottom copper layers.

From there, we can assign the board outline Filled Zone to be on the top and bottom layer and set to be part of the GND net.

After selecting OK, we can draw the Filled Zone polygon over the the shape outline of the board.

Since copper pours are static, they will remain unchanged even if traces or components are moved around on the board. Therefore, to update the copper pour, it must be filled via right-clicking on it and selecting Draft Fill Selected Zone(s).

This should leave us with a copper pour over the top layer that has cutouts for all of the component pads and traces on the board.

As well as on the bottom layer.

Since copper pours often cover large areas with copper, it can be hard to see traces that you have newly routed over where a copper pour was made.So in order to hide a copper pour from view (and have it filled in later), the copper pour can also be unfilled (i.e., hidden) via right-clicking on it and selecting Unfill Selected Zone(s).

Conclusion

This concludes the instruction for Lab 05. From here, you should attempt to layout your entire board. In Lab 06, we’ll go over some additional final steps for the board layout including getting it ready for fabrication/purchase, so it’s best to have a finished board by then.

Course staff will be conducting live board reviews and providing feedback during Lab 06. Therefore, please take today and tomorrow to complete the lab as best you can. You can also check out the Resources page page for additional information.

Footnotes